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  IN74HCU04A IN74HCU04A hex unbuffered inverters high-performance silicon-gate cmos ordering information IN74HCU04An plastic IN74HCU04Ad soic t a = -55 to 125 c for all packages the IN74HCU04A is identical in pinout to the 74ls04. this contain six independent unbuffered inverters. these inverters are well suited for use as oscillators, pulse shapers and in many other applications requiring a high-input impedance amplifier. this device is characterized for ove r wide temperature ranges to meet industry and ation over military specifications. ? low power consumption characteristic of cmos devices ? output drive capability: 10 ls ttl loads min. ? operating speed superior to ls ttl ? wide operating voltage range: 2.0 to 6.0 v ? low input current: 1.0 a max. ? low quiescent current: 20 a max. ? high noise immunity characteristic of cmos ? diode protection on all inputs pin assignment logic diagram pin 14 =v cc pin 7 = gnd function table inputs output a y l h h l 1
IN74HCU04A 2 maximum ratings * symbol parameter value unit v cc dc supply voltage (referenced to gnd) -0.5 to +7.0 v v in dc input voltage (referenced to gnd) -1.5 to v cc +1.5 v v out dc output voltage (referenced to gnd) -0.5 to v cc +0.5 v i in dc input current, per pin 20 ma i out dc output current, per pin 25 ma i cc dc supply current, v cc and gnd pins 50 ma p d power dissipation in still air, plastic dip+ soic package+ 750 500 mw tstg storage temperature -65 to +150 c t l lead temperature, 1 mm from case for 10 seconds (plastic dip or soic package) 260 c * maximum ratings are those values beyond which damage to the device may occur. functional operation should be restricted to the reco mmended operating conditions. +derating - plastic dip: - 10 mw/ c from 65 to 125 c soic package: : - 7 mw/ c from 65 to 125 c recommended operating conditions symbol parameter min max unit v cc dc supply voltage (referenced to gnd) 2.0 6.0 v v in , v out dc input voltage, output voltage (referenced to gnd) 0 v cc v t a operating temperature, all package types -55 +125 c t r , t f input rise and fall time (figure 1) v cc =2.0 v v cc =4.5 v v cc =6.0 v 0 0 0 1000 500 400 ns this device contains protection circuitry to guard agains t damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage highe r than maximum rated voltages to this high-impedance circuit. for proper operation, v in and v out should be constrained to the range gnd (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open.
IN74HCU04A 3 dc electrical characteristics (voltages referenced to gnd) v cc guaranteed limit symbol parameter test conditions v 25 c to -55 c 85 c 125 c unit v ih minimum high- level input voltage 2.0 4.5 6.0 1.7 3.6 4.8 1.7 3.6 4.8 1.7 3.6 4.8 v v il maximum low - level input voltage 2.0 4.5 6.0 0.3 0.8 1.1 0.3 0.8 1.1 0.3 0.8 1.1 v v oh minimum high- level output voltage v in =v ih or v il i oh = -20 a 2.0 4.5 6.0 1.8 4.0 5.5 1.8 4.0 5.5 1.8 4.0 5.5 v v in =v ih or v il i oh = -4 ma i oh = -5.2 ma 4.5 6.0 3.86 5.36 3.76 5.26 3.7 5.2 v ol maximum low- level output voltage v in =v ih or v il i ol = 20 a 2.0 4.5 6.0 0.2 0.5 0.5 0.2 0.5 0.5 0.2 0.5 0.5 v v in =v ih or v il i ol = 4 ma i ol = 5.2 ma 4.5 6.0 0.32 0.32 0.37 0.37 0.4 0.4 i in maximum input leakage current v in =v cc or gnd 6.0 0.1 1.0 1.0 a i cc maximum quiescent supply current (per package) v in =v cc or gnd i out =0 a 6.0 2.0 20 40 a
IN74HCU04A ac electrical characteristics (c l =50pf,input t r =t f =6.0 ns) v cc guaranteed limit symbol parameter v 25 c to -55 c 85 c 125 c unit t plh , t phl maximum propagation delay, input a to output y (figures 1 and 2) 2.0 4.5 6.0 80 16 14 100 20 17 120 24 20 ns t tlh , t thl maximum output transition time, any output (figures 1 and 2) 2.0 4.5 6.0 75 15 13 95 19 16 110 22 19 ns c in maximum input capacitance - 10 10 10 pf power dissipation capacitance (per inverter) typical @25 c,v cc =5.0 v c pd used to determine the no-load dynamic power consumption: p d =c pd v cc 2 f+i cc v cc 15 pf * includes all probe and jig capacitance c l * test point device under test output t r v cc gnd 90% 50% 10% 90% 50% 10% input a output y t phl t plh t 4 t h l tl t h t f figure 1. switching waveforms. figure 2. test circuit logic detail (1/6 of device show) a v cc y typical applications
IN74HCU04A crystal oscillator stable rc oscillator r 2 1/6 hcu04 c 1 r 2 > > r 1 c 1 < c 2 v out c 2 r 1 r 2 r 1 c 1/6 hcu04 1/6 hcu04 1/6 hcu04 v out schmitt trigger high input single-stage amplifier with a 2 to 6 v supply range r 2 r 1 v in v out 1/6 hcu04 1/6 hcu04 r 2 > 6r 1 v cc input output 1 m 1 m 1/6 hcu04 multi-stage amplifier led driver v cc input output 1/6 hcu04 1/6 hcu04 1/6 hcu04 +v 1/6 hcu04 for reduced power suplly curre nt, use high-efficiency leds such as the hewlett-packard hlmp series or equivalent 5
IN74HCU04A n suffix plastic dip (ms - 001aa) symbol min max a 18.67 19.69 b 6.1 7.11 c 5.33 d 0.36 0.56 f 1.14 1.78 g h j 0 10 k 2.92 3.81 notes: l 7.62 8.26 1. dimensions ?a?, ?b? do not include mold flash or protrusions. m 0.2 0.36 maximum mold flas h or protrus ions 0.25 mm (0.010) per s ide. n 0.38 d suffix soic (ms - 012ab) symbol min max a 8.55 8.75 b 3.8 4 c 1.35 1.75 d 0.33 0.51 f 0.4 1.27 g h j 0 8 notes: k 0.1 0.25 1. dimensions a and b do not include mold flash or protrusion. m 0.19 0.25 2. maximum mold flas h or protrus ion 0.15 mm (0.006) per s ide p 5.8 6.2 for a; for b ? 0.25 mm (0.010) per s ide. r 0.25 0.5 dimens ion, mm 1.27 5.27 2.54 7.62 dimens ion, mm a b h c k c m j f m p g d r x 45 seating plane 0.25 (0.010) m t -t- 1 14 7 8 a b f g d l h seating plane n k 0.25 (0.010) m t m j -t- c 1 14 7 8 6


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